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  2-39 features ? fax and modem interface v.34(33k6) ? externally programmable line and network balance impedances ? programmable dc termination characteristics ? iec950 recognised component ? transformerless 2-4 wire conversion ? integral loop switch ? dial pulse and dtmf operation ? accommodates parallel phone detection ? line state detection outputs:- loop current/ringing voltage/line voltage ? single +5v operation, low on-hook power (35mw) ? full duplex voice and data transmission ? on-hook reception from the line ? approvable to ul1950 ? industrial temperature range available applications interface to central office or pabx line for: ? fax/modem (including software modems) ? electronic point of sale ? security system ? telemetry ? set top boxes description the zarlink MH88435 data access arrangement (d.a.a.) provides a complete interface between audio or data transmission equipment and a telephone line. all functions are integrated into a single thick film hybrid module which provides high voltage isolation, very high reliability and optimum circuit design, needing a minimum of external components. the impedance and network balance are externally programmable, as are the dc termination characteristics, making the device suitable for most countries worldwide. figure 1 - functional block diagram opto- isolation logic input buffer isolation isolation isolation analog buffer analog buffer buffer thl cancellation impedance matching circuit isolation barrier vcc agnd lc vr+ vx rv tip ring user connections network connections input buffer & ring & loop line termination vloop2 vr- nb1 nb2 loop lcd za rs vbias and line vloop1 ds5132 issue 9 october 2001 package information MH88435ad-p 28 pin dil package 0 c to +70 c MH88435-p dataaccessarrangement preliminary information
MH88435-p preliminary information 2-40 figure 2 - pin connections pin description pin # name description 1 nb1 network balance 1. external passive components must be connected between this pin and nb2. 2 nb2 network balance 2 . external passive components must be connected between this pin and nb1. 3 vr+ differential receive (input). analog input from modem/fax chip set. 4 vr- differential receive (input). analog input from modem/fax chip set. 5 vx transmit (output). ground referenced (agnd) output to modem/fax chip set, biased at +2.0v. 6 lc loop control (input). a logic 1 applied to this pin activates internal circuitry which provides a dc termination across tip and ring. this pin is also used for dial pulse application. 7 za line impedance. connect impedance matching components from this pin to ground (agnd). 8 agnd analog ground. 4-wire ground. connect to earth. 9 v cc positive supply voltage . +5v. 10 vbias internal reference voltage. +2.0v reference voltage. this pin should be decoupled externally to agnd, typically with a 10 m f 6.3v capacitor . 11 loop loop (output). the output voltage on this pin is proportional to the line voltage across tip - ring, scaled down by a factor of 50. 12, 14, 17, 20, 23, 26 ic internal connection. no connection should be made to this pin externally. 13 rs ringing sensitivity. connecting a link or resistor between this pin and loop (pin 11) will vary the ringing detection sensitivity of the module. 15 lcd loop condition detect (output). indicates the status of loop current. 16 rv ringing voltage detect (output). the rv output indicates the presence of a ringing voltage applied across the tip and ring leads. ic ic lc ic tip agnd ring rv za vx vr- vcc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 vr+ nb1 nb2 vbias loop ic rs ic vloop1 vloop2 ic np np lcd sc sc
preliminary information MH88435-p 2-41 18, 19 np no pin. isolation barrier, no pin fitted in this position. 21, 22 sc short circuit. these two pins should be connected to each other via a 0 w link. 24 vloop2 loop voltage control node 2. used to set dc termination characteristics. 25 vloop1 loop voltage control node 1. used to set dc termination characteristics. 27 ring ring lead. connects to the ?ring? lead of the telephone line. 28 tip tip lead. connects to the ?tip? lead of the telephone line. pin description (continued) functional description the device is a data access arrangement (d.a.a.). it is used to correctly terminate a 2-wire telephone line. it provides a signalling link and a 2-4 wire line interface between an analog loop and subscriber data transmission equipment, such as modems, facsimiles (fax?s), remote meters, electronic point of sale equipment and set top boxes. isolation barrier the device provides an isolation barrier capable of meeting the supplementary barrier requirements of the international standard iec 950 and the national variants of this scheme such as en 60950 for european applications and ul 1950 for north american applications and is classified as a telecom network voltage (tnv) circuit. external protection circuit an external protection circuit assists in preventing damage to the device and the subscriber equipment, due to over-voltage conditions. see application note, msan-154 for recommendations. suitable markets the MH88435 has features such as programmable input and network balance impedance, programmable dc termination and a supplementary isolation barrier that makes it ideal for use throughout the world. there are a small number of countries with a 100m w leakage requirement that this device does not meet. these are belgium, greece, italy, luxembourg and spain. france?s current limit specification and germany?s dial pulse requirements are met by the mh88437. this device is pin for pin compatible with the MH88435. approval specifications are regularly changing and the relevant specification should always be consulted before commencing design. line termination when loop control (lc) is at a logic 1, a line termination is applied across tip and ring. the device is off-hook and dc loop current will flow. the line termination consists of both a dc line termination and an ac input impedance. it is used to terminate an incoming call, seize the line for an outgoing call, or if it is applied and disconnected at the required rate, can be used to generate dial pulses. the dc termination is approximately 300 w resistance, which is loop current dependent. it can be programmed to meet different national requirements. for normal operation pin 22 and pin 21 should be linked, and a resistor (r2) should be fitted between vloop1 and vloop2 as shown in figure 5. the approval specification will give a dc mask characteristic that the equipment will need to comply to. the dc mask specifies the amount of current the daa can source for a given voltage across tip and ring. figure 3 shows how the voltage across tip and ring varies with different resistors (r2) for a given loop current. the ac input impedance should be set by the user to match the line impedance.
MH88435-p preliminary information 2-42 input impedance the MH88435 has a programmable input impedance set by fitting external components between the za pin and agnd. for complex impedances the configuration shown in figure 4 is most commonly found. figure 4 - complex impedances to find the external programming components for configuration 4, the following formula should be used: zext = [(10 x r1)-1k3]+ [10 x r2)//(c1/10)] e.g. if the required input impedance = 220 w + (820 w //115nf), the external network to be connected to za will be: zext = 900 w + (8k2 w //12nf) where the input impedance (z) = 600r the equation can be simplified to: zext = (10 x z) - 1k3 w zext = 4k7 w note: a table of commonly used impedances can be found in the daa application?s document msan-154. zext = external network connected between za and agnd, zint = 1.3k w (internal resistance). network balance the network balance impedance of the device can be programmed by adding external components between nb1 and nb2. for countries where the balance impedance matches the line impedance, a 15k w resistor should be added between nb1 and nb2. ringing voltage detection the sensitivity of the ringing voltage detection circuitry can be adjusted by applying an external resistor between the rs and loop pins. with a short circuit, the threshold sensitivity is ~10vrms r7 can be calculated using the equation: r1 r2 c1 za iloop=26ma iloop=20ma iloop=15ma 10 5 0 25 20 15 30 r2(kohms) 200 600 1000 1400 1800 2200 2600 3000 3400 3800 figure 3 - dc programming capabilities (v(t-r)
preliminary information MH88435-p 2-43 r7 = 30 k w x (desired threshold voltage - 10vrms) therefore, 300k k w gives ~ 20vrms and 600k k w gives ~ 30vrms an ac ringing voltage across tip and ring will cause rv to output ttl pulses at the ringing frequency, with an envelope determined by the ringing cadence. parallel phone and dummy ringer an external parallel phone or dummy ringer circuit can be connected across tip and ring as shown in figure 5. a dummy ringer is an ac load which represents a telephone?s mechanical ringer. in normal circumstances when a telephone is on- hook and connected to the pstn, its ac (ringer) load is permanently presented to the network. this condition is used by many ptt?s to test line continuity by placing a small ac current onto the line and measuring the voltage across tip (a) and ring (b). today?s telecom equipment may not have an ac load present across tip and ring (e.g. modems), therefore any testing carried out by the ptt will see an open circuit across tip and ring. in this instance the ptt assumes that the line continuity has been damaged. to overcome this problem many ptt?s specify that a "dummy ringer" is presented to the network at all times. ideally its impedance should be neglible in the audio band, and high at the ringing frequencies (e.g. 25hz). note that the requirement for the "dummy ringer" is country specific. parallel phone detection is used mostly in set-top box applications. this is when a modem call will need to be disconnected from the central office by the equipment when the parallel phone is in the off- hook state. this is so that a call can be made to the emergency services. to detect this state, additional circuitry will be required and can be found in the application note, msan-154. 2-4 wire conversion the device converts the balanced 2-wire input, presented by the line at tip and ring, to a ground referenced signal at vx, biased at 2.0v. this simplifies the interface to a modem chip set. conversely, the device converts the differential signal input at vr+ and vr- to a balanced 2-wire signal across tip and ring. the device can also be used in a single ended mode at the receive input, by leaving vr+ open circuit and connecting the input signal to vr- only. both inputs are biased at 2.0v. during full duplex transmission, the signal at tip and ring consists of both the signal from the device to the line and the signal from the line to the device. the signal input at vr+ and vr- being sent to the line, must not appear at the output vx. in order to prevent this, the device has an internal cancellation circuit. the measure of this attenuation is transhybrid loss (thl). the MH88435 has the ability to transmit analog signals from tip and ring through to vx when on- hook. this can be used when receiving caller line identification information. transmit gain the transmit gain of the MH88435 is the gain from the differential signal across tip and ring to the ground referenced signal at vx. the internal transmit gain of the device is fixed as shown in the ac electrical characteristics table. for the correct gain, the input impedance of the MH88435, must match the specified line impedance. by adding an external potential divider to vx, it is possible to reduce the overall gain in the application. the output impedance of vx is approximately 10 w and the minimum resistance from vx to ground should be 2k w . example: if r3 = r4 = 2k w, in figure 5, the overall gain would reduce by 6.0db.
MH88435-p preliminary information 2-44 receive gain the receive gain of the MH88435 is the gain from the differential signal at vr+ and vr- to the differential signal across tip and ring. the internal receive gain of the device is fixed as shown in the ac electrical characteristics table. for the correct gain, the input impedance of the MH88435 must match the specified line impedance. with an internal series input resistance of 47k w at the vr+ and vr- pins, external series resistors can be used to reduce the overall gain. overall receive gain = 0db + 20log (47k w / (47k w +r5)). for differential applications r6 must be equal to r5 in figure 5. example: if r5 = r6 = 47k in figure 5, the overall gain would reduce by 6.0db. supervisory features the device is capable of monitoring the line conditions across tip and ring, this is shown in figure 5. the loop condition detect pin (lcd), indicates the status of the line. the lcd output is at logic 1 when loop current flows, indicating that the MH88435 is in an off-hook state. lcd will also go high if a parallel phone goes off-hook while the daa is on-hook. therefore, line conditions can be determined with the lc and the lcd pins. the loop pin output voltage, vloop, is proportional to the line voltage across tip and ring, v (t-r), scaled down by a factor of 50 and offset by vbias which is approximately 2v. with the aid of a simple external detector the lc, lcd and loop pins can be used to generate the signals necessary for parallel phone operation with a set top box. refer to msan-154. if tip is more positive than ring vloop < vbias if tip is more negative than ring vloop > vbias v (t-r) ? (vloop - vbias) * 50 when the device is generating dial pulses, the lcd pin outputs ttl pulses at the same rate. the lcd output will also pulse if a parallel phone is used to pulse dial and also when ringing voltage is present at tip and ring. mechanical data see figure 12 for details of the mechanical specification.
preliminary information MH88435-p 2-45 figure 5 - typical application circuit tip nb2 ring vx vr+ rv lc agnd v c c tip ring c2 +5v 9 8 6 16 5 3 27 28 analog input analog ringing voltage detect output loop control input MH88435 + output c3 c1 notes: 1) r1 & c1: dummy ringer, country specific za 7 zext 2) r2: dc mask resistor typical 360k w r1 25 24 v l o o p 1 v l o o p 2 vr - 4 analog input r2 lcd 15 loop current detect output nb1 5) zb: network balance impedance r3 r5 r6 r4 4) r5 = r6: receive gain resistors typically 100k 3) r3 & r4: transmit gain resistors 3 2k2 c6 + 10 vbias typically 0.39 m f, 250v & 3k w 6) c2, c6 = 10 m f 6v 7) c7 & c8 = 39nf for 12khz filter and 22nf for 16khz filter. these can be left off if meter pulse filtering not required. 8) zext: external impedance 9) d1 zener diode 6v2 10) l1, l2 = 4m7h 80ma. these can be left off if meter pulse filtering not required. d1 c7 l1 l2 c8 13 11 r s l o o p zb 1 2 c4 c5 11) c3, c4 & c5 = 1 m f coupling capacitors 12) r7 = 620k w (30v rms ringing sensitivity) d2 r7 13) d2 = teccor p3100sb = ground (earth) 22 21
MH88435-p preliminary information 2-46 . *exceeding these values may cause permanent damage. functional operation under these conditions is not implied. ? typical figures are at 25c with nominal +5v supply and are for design aid only ? electrical characteristics are over recommended operating conditions unless otherwise stated. ?typical figures are at 25 c with nominal + 5v supplies and are for design aid only. note 1: refer to eia/tia 464 section 4.1.1.4.4. note 2: this is equivalent to 10m w leakage tip/ring to ground. for countries requiring 100m w leakage use the mh88436 with an enhanced leakage specification. note 3: operation at low loop currents depends on the dc programming resistor between vloop1/2. the recommended 360k value will support v34 operation down to 20ma. voice operation is supported down to 15ma. absolute maximum ratings* - all voltages are with respect to agnd unless otherwise specified. parameter sym min max units comments 1 dc supply voltage v cc -0.3 6 v 2 storage temperature t s -55 +125 c 3 dc loop voltage v bat -110 +110 v 4 ringing voltage v r 150 vrms vbat = -56v 5 loop current i loop 90 ma 6 ring trip current i trip 180 ma rms 250ms 10% duty cycle or 500ms single shot recommended operating conditions parameter sym min typ ? max units test conditions 1 dc supply voltages v cc 4.75 5.0 5.25 v 2 operating temperatures industrial temperature t op 0 -40 25 70 +85 c 3 ringing voltage v r 75 90 vrms loop electrical characteristics ? - characteristics sym min typ ? max units test conditions 1 ringing voltage threshold vr 7 10 14 vrms externally adjustable 2 ringing frequency 15 68 hz 3 operating loop current 15 80 ma note 3 4 off-hook dc voltage tip/ring 6.0 6.0 7.8 v v v test circuit as fig. 4 i loop =15ma )note 1 i loop =20ma )where r2 =i loop =26ma ) 360k w 5 leakage current (tip or ring to agnd) 10 7 m a ma rms 100v dc note 2. 1000v ac 6 leakage current on-hook (tip to ring) 9 10 m a v bat = -50v 7 dial pulse delay on off 0 0 +2 +2 +4 +4 ms ms 8 loop condition detect threshold off-hook 5 16 v voltage across tip and ring
preliminary information MH88435-p 2-47 ? electrical characteristics are over recommended operating conditions unless otherwise stated. ?typical figures are at 25 c with nominal + 5v supplies and are for design aid only. dc electrical characteristics ? characteristics sym min typ ? max units test conditions 1 supply current i cc 7 ma v cc = 5.0v, on-hook 2 rv, lcd low level output voltage high level output voltage v ol v oh 2.4 0.4 v v i ol = 4ma i oh = 0.4ma 3 lc low level input voltage high level input voltage low level input current high level input current v il v ih i il i ih 2.0 0 350 0.8 10 400 v v m a m a v il = 0.0v v ih = 5.0v ac electrical characteristics ? characteristics sym min typ ? max units test conditions 1 input impedance vr- vr+ 47k 94k w w 2 output impedance at vx 10 w 3 receive gain (vr to 2-wire) -1 0 1 db test circuit as fig. 8 input 0.5v at 1khz 4 frequency response gain (relative to gain @ 1khz) -0.5 -0.5 +0.4 0 +0.5 +0.5 db db 300hz 3400hz 5 signal output overload level at 2-wire at vx 0 0 dbm dbm thd < 5% @ 1khz i loop = 25-75ma 6 signal/noise & distortion at 2-wire at vx sinad 70 70 db db input 0.5v at 1khz i loop = 25-75ma 300-3400hz 7 power supply rejection ratio at 2-wire at vx psrr 25 25 40 40 db db ripple 0.1vrms 1khz on v cc 8 transhybrid loss thl 16 25 db test circuit as fig.8 300-3400hz at v r 9 2-wire input impedance zin note 3 w @1khz 10 return loss at 2-wire (reference 600 w ) rl 14 20 18 20 24 24 db db db test circuit as fig. 9 200-500hz 500-2500hz 2500-3400hz 11 longitudinal to metallic balance metallic to longitudinal balance 46 46 60 40 65 65 68 62 db db db db test circuit as fig. 10 300-1000hz 1000-3400hz test circuit as fig.11 200-1000hz 1000-4000hz
MH88435-p preliminary information 2-48 ? electrical characteristics are over recommended operating conditions unless otherwise stated. ?typical figures are at 25 c with nominal +5v and are for design aid only. note 1: all of the above test conditions use a test source impedance which matches the device?s impedance. note 2: dbm is referenced to 600 w unless otherwise stated . note 3: these parameters need to be taken into consideration when designing or specifying the power supply. 12 idle channel noise at 2-wire at vx at 2-wire at vx nc 10 10 -80 -80 20 20 dbrnc dbrnc dbm dbm cmess filter 300-3400hz filter 13 transmit gain (2-wire to vx) (terminated gain) off-hook (voltage gain) on-hook -1 0 0 +1 db db test circuit as fig. 7 input 0.5v @ 1khz lc = 0v 14 frequency response gain (relative to gain @ 1khz) -1 -1 +0.3 +0.2 +1 +1 db db 300hz 3400hz 15 intermodulation distortion products at vx and 2w imd 60 db i loop = 25-75ma f1 = 1khz at -6dbm f2 = 800hz at -6dbm total signal power = -3dbm 16 distortion at vx due to near end echo (300hz - 3400hz bandwidth) 75 db i loop = 25-75ma f1 = 1khz at -6dbm f2 = 800hz at -6dbm total signal power = -3dbm 17 common mode rejection on 2 wire at vx cmrr 56 db test circuit as fig. 10 1-100hz. note 4 18 common mode overload level cmol 7 vrms test circuit as fig. 10. note 4 ac electrical characteristics ? characteristics sym min typ ? max units test conditions
preliminary information MH88435-p 2-49 figure 6 - test circuit 1 figure 7 - test circuit 2 MH88435 3 4 5 25 vx agnd rv vr+ vr- tip nb1 ring 24 22 21 360k vloop1 lc 5v 1k vloop2 vcc za nb2 10uf vbias 10 27 2 28 1 15k 6 16 8 7 9 4.7k loop rs lcd 11 13 15 iloop 5v = ground (earth) sc sc vs i=20ma 10h 500 w -v 100uf 10h 500 w + 100uf + gain = [20 * log (vx / vs)] + 6.02 db MH88435 3 4 5 25 vx agnd rv vr+ vr- tip nb1 ring 24 22 21 360k vloop1 lc 5v 1k vloop2 vcc za nb2 10uf vbias 10 27 2 28 1 15k 6 16 8 7 9 4.7k 5v loop rs lcd 11 13 15 impedance = zin = ground (earth) sc sc
MH88435-p preliminary information 2-50 figure 8 - test circuit 3 figure 9 - test circuit 4 100uf z in 10h 500 w -v i=20ma 10h 500 w 100uf + + gain = 20 * log (v(zin) / vs) MH88435 3 4 5 25 vx agnd rv vr+ vr- tip nb1 ring 24 22 21 360k vloop1 lc 5v 1k vloop2 vcc za nb2 10uf vbias 10 27 2 28 1 15k 6 16 8 7 9 4.7k 5v loop rs lcd 11 13 15 vs = ground (earth) sc sc 100uf -v 10h 500 w i=20ma v1 300 w 300 w vs = 0.5v + 100uf + return loss = 20 * log (2v1 / vs) 10h 500 w zin MH88435 3 4 5 25 vx agnd rv vr+ vr- tip nb1 ring 24 22 21 360k vloop1 lc 5v 1k vloop2 vcc za nb2 10uf vbias 10 27 2 28 1 15k 6 16 8 7 9 4.7k loop rs lcd 11 13 15 5v = ground (earth) sc sc
preliminary information MH88435-p 2-51 figure 10 - test circuit 5 figure 11 - test circuit 6 100uf vs = 0.5v 300 w 300 w -v 10h 500 w i=20ma + + 100uf long. to met. balance = 20 * log (v1 / vs) v1 10h 500 w MH88435 3 4 5 25 vx agnd rv vr+ vr- tip nb1 ring 24 22 21 360k vloop1 lc 5v 1k vloop2 vcc za nb2 10uf vbias 10 27 2 28 1 15k 6 16 8 7 9 4.7k 5v loop rs lcd 11 13 15 cmr = 20 * log (vx / vs) = ground (earth) sc sc cmol = v2 v2 -v 10h 500 w i=20ma 300 w 300 w v1 vs 100uf + 100uf + met. to long. balance = 20 * log (v1 / vs) 10h 500 w 510 w MH88435 3 4 5 25 vx agnd rv vr+ vr- tip nb1 ring 24 22 21 360k vloop1 lc 5v 1k vloop2 vcc za nb2 10uf vbias 10 27 2 28 1 15k 6 16 8 7 9 4.7k 5v loop rs lcd 11 13 15 = ground (earth) sc sc
MH88435-p preliminary information 2-52 figure 12 - mechanical data for 28 pin dil hybrid notes: 1) not to scale 2) dimensions in inches. (dimensions in millimetres) 1.42 max (36.1 max) 0.162 max (4.12 max) 0.05 typ (1.27 typ) 0.020 + 0.005 (0.5 + 0.13) 0.063 max 0.260 + 0.015 (25.4 typ) 1.05 max (26.7 max) * dimensions to centre of pin. 1.00 typ 0.27 max (6.9 max) 0.08 typ (2 typ) 0.100 + 0.010 (2.54 + 0.25) * * 1 * (1.6 max) (6.6 + 0.38) 3) pin tolerances are non-accumulative. 4) recommended soldering conditions: wave soldering - max temp at pins 260 c for 10 secs. 0.300 + 0.010 (7.62 + 0.25) *
preliminary information MH88435-p 2-53 notes:
www.zarlink.com information relating to products and services furnished herein by zarlink semiconductor inc. or its subsidiaries (collectively ?zarlink?) is believed to be reliable. however, zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from t he application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. neither the supply of such information or purchase of product or service conveys any license, either express or implied, u nder patents or other intellectual property rights owned by zarlink or licensed from third parties by zarlink, whatsoever. purchasers of products are also hereby notified that the use of product in certain ways or in combination with zarlink, or non-zarlink furnished goods or services may infringe patents or other intellect ual property rights owned by zarlink. this publication is issued to provide information only and (unless agreed by zarlink in writing) may not be used, applied or re produced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. the products, t heir specifications, services and other information appearing in this publication are subject to change by zarlink without notice. no warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. it is the user?s responsibility t o fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not b een superseded. manufacturing does not necessarily include testing of all functions or parameters. these products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. all products and materials are sold and services provided subject to zarlink?s conditi ons of sale which are available on request. purchase of zarlink?s i 2 c components conveys a licence under the philips i 2 c patent rights to use these components in and i 2 c system, provided that the system conforms to the i 2 c standard specification as defined by philips. zarlink, zl and the zarlink semiconductor logo are trademarks of zarlink semiconductor inc. copyright zarlink semiconductor inc. all rights reserved. technical documentation - not for resale for more information about all zarlink products visit our web site at


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